Oliveira, Alberto Vinicius de; Simoen, Eddy 
; Thean, Aaron; Agopian, Paula Ghedini Der ; Martino, João Antonio ; Claeys, Cor ; Mertens, Hans; Collaert, Nadine
Source: ECS Transactions volume 66 issue 5 on pages 309 to 314. Unidade: EP
Subjects: MICROELETRÔNICA, TRANSISTORES
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ABNT
OLIVEIRA, Alberto Vinicius de et al. Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs. ECS Transactions volume 66 issue 5 on pages 309 to 314, v. 66, n. 5, p. 309-314, 2016Tradução . . Disponível em: https://doi.org/10.1149/06605.0309ecst. Acesso em: 10 maio 2024.APA
Oliveira, A. V. de, Simoen, E., Thean, A., Agopian, P. G. D., Martino, J. A., Claeys, C., et al. (2016). Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs. ECS Transactions volume 66 issue 5 on pages 309 to 314, 66( 5), 309-314. doi:10.1149/06605.0309ecstNLM
Oliveira AV de, Simoen E, Thean A, Agopian PGD, Martino JA, Claeys C, Mertens H, Collaert N. Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs [Internet]. ECS Transactions volume 66 issue 5 on pages 309 to 314. 2016 ; 66( 5): 309-314.[citado 2024 maio 10 ] Available from: https://doi.org/10.1149/06605.0309ecstVancouver
Oliveira AV de, Simoen E, Thean A, Agopian PGD, Martino JA, Claeys C, Mertens H, Collaert N. Impact of Gate Stack Layer Composition on Dynamic Threshold Voltage and Analog Parameters of Ge pMOSFETs [Internet]. ECS Transactions volume 66 issue 5 on pages 309 to 314. 2016 ; 66( 5): 309-314.[citado 2024 maio 10 ] Available from: https://doi.org/10.1149/06605.0309ecst
